confovis · Company · Resources · CEA Leti Innovation Days 2026

What CEA-Leti Innovation Days 2026 Revealed about Optical Interconnects for AI Infrastructure

Author

Alessandro Mapelli

Dates

June 23–25, 2026

Event

CEA-Leti Innovation Days / LID World Summit 2026

Location

Grenoble, France

CEA-Leti Innovation Days 2026 confirmed that optical interconnects are moving closer to processors and memory as AI systems demand more bandwidth with lower data-movement energy. Silicon photonics, co-packaged optics, photonic interposers and advanced packaging are therefore becoming closely connected manufacturing technologies. Their industrialisation will require both high-throughput defect inspection and quantitative dimensional metrology.

Why is data movement becoming a limitation for AI systems?

AI accelerators can perform enormous numbers of operations, but only if data reaches them quickly enough. As computing power increases, memory bandwidth and communication between devices can become limiting factors — this consumes energy and generates heat, especially through dense, high-speed electrical connections.

The challenge is therefore not only to increase processing capacity, but also to shorten data paths, increase bandwidth and reduce the energy required to move each bit — driving interest in high-bandwidth memory, 3D integration, chiplets and optical communication.

Why are optical interconnects moving closer to processors?

Optical communication is already widely used between data centres, racks and network equipment. The next transition is to bring optical connections closer to computing devices:

Bringing the optical engine closer to the processor shortens the high-speed electrical connection, helping systems reach higher aggregate bandwidths without a proportional increase in power consumption.

At CEA-Leti Innovation Days 2026, optical interconnects were presented as a family of approaches including silicon photonics, photonic interposers, integrated light sources and highly parallel optical links.

How do memory, chiplets and silicon photonics fit together?

Optical interconnects cannot be developed independently from the rest of the computing system. This creates a need for co-design across:

This also explains why optical interconnects are closely linked to advanced packaging — bringing optics closer to processors requires accurate placement, alignment, bonding and dimensional control across multiple materials and device types.

Which photonic structures need inspection and metrology?

For photonic integrated circuits, relevant targets include waveguides, couplers, etched features, alignment structures and transparent layers. For optical engines and co-packaged systems, the scope may extend to micro-bumps and bonding surfaces.

How can defect inspection and 3D metrology work together?

As optics moves closer to compute, inspection must extend beyond locating visible defects — manufacturers must also determine whether photonic and packaging structures remain within specification.

This is not a new problem for Confovis to solve from scratch. Visible-light SIM is already applied to silicon photonics and optical interconnect structures — waveguides, couplers, and alignment-critical features on patterned wafers — the same category of structures described above.

Because defect inspection and 3D metrology share a single optical beam path, defect location and dimensional measurement are co-registered — manufacturers can locate a defect and evaluate whether the affected structure remains within specification using the same acquisition, not two separately aligned tools.

Infrared SIM extends optical sectioning and 3D imaging to selected bonded interfaces and buried structures where infrared transmission is possible — relevant as optical engines and co-packaged systems bring bonding and interconnect structures into the same manufacturing flow.

What was the central takeaway from LID 2026?

As optics moves closer to compute, inspection and metrology must move closer together. Confovis is positioned to support this transition by combining full-wafer defect inspection, high-resolution 3D metrology and optical sectioning within one platform.

FAQs

Optical interconnects can transmit large amounts of data while reducing some of the signal-loss and energy challenges associated with high-speed electrical links.

Typical targets include waveguides, grating couplers, edge couplers, etched structures, alignment marks and transparent layers. Relevant parameters may include width, height, position, overlay, topography and line edge roughness.

Defect inspection identifies anomalies such as particles, scratches or pattern deviations. Metrology provides quantitative measurements of dimensions and surface topography. Photonic manufacturing generally requires both.